diff options
author | Michael Maitland <michaeltmaitland@gmail.com> | 2024-09-17 10:08:39 -0400 |
---|---|---|
committer | GitHub <noreply@github.com> | 2024-09-17 10:08:39 -0400 |
commit | ee2add06836afdda6c86792441e6afdf6993f770 (patch) | |
tree | f5e0b1360da2205f0d473b4c5d662cb51dbb78b6 /llvm/lib/CodeGen/MachineVerifier.cpp | |
parent | 49a754a43d5592e08ef177db794126ddc676d6b5 (diff) | |
download | llvm-ee2add06836afdda6c86792441e6afdf6993f770.zip llvm-ee2add06836afdda6c86792441e6afdf6993f770.tar.gz llvm-ee2add06836afdda6c86792441e6afdf6993f770.tar.bz2 |
[GISEL] Fix bugs and clarify spec of G_EXTRACT_SUBVECTOR (#108848)
The implementation was missing the fact that `G_EXTRACT_SUBVECTOR`
destination and source vector can be different types.
Also fix a bug in the MIR builder for `G_EXTRACT_SUBVECTOR` to generate
the correct opcode.
Clarify the G_EXTRACT_SUBVECTOR specification.
Diffstat (limited to 'llvm/lib/CodeGen/MachineVerifier.cpp')
-rw-r--r-- | llvm/lib/CodeGen/MachineVerifier.cpp | 23 |
1 files changed, 19 insertions, 4 deletions
diff --git a/llvm/lib/CodeGen/MachineVerifier.cpp b/llvm/lib/CodeGen/MachineVerifier.cpp index 759201e..6eed73c 100644 --- a/llvm/lib/CodeGen/MachineVerifier.cpp +++ b/llvm/lib/CodeGen/MachineVerifier.cpp @@ -1778,10 +1778,25 @@ void MachineVerifier::verifyPreISelGenericInstruction(const MachineInstr *MI) { break; } - if (IndexOp.getImm() != 0 && - SrcTy.getElementCount().getKnownMinValue() % IndexOp.getImm() != 0) { - report("Index must be a multiple of the source vector's minimum vector " - "length", + if (SrcTy.isScalable() != DstTy.isScalable()) { + report("Vector types must both be fixed or both be scalable", MI); + break; + } + + uint64_t Idx = IndexOp.getImm(); + uint64_t DstMinLen = DstTy.getElementCount().getKnownMinValue(); + if (Idx % DstMinLen != 0) { + report("Index must be a multiple of the destination vector's minimum " + "vector length", + MI); + break; + } + + uint64_t SrcMinLen = SrcTy.getElementCount().getKnownMinValue(); + if (SrcTy.isScalable() == DstTy.isScalable() && + (Idx >= SrcMinLen || Idx + DstMinLen > SrcMinLen)) { + report("Source type and index must not cause extract to overrun to the " + "destination type", MI); break; } |