aboutsummaryrefslogtreecommitdiff
path: root/llvm/lib/CodeGen/MachineVerifier.cpp
diff options
context:
space:
mode:
authorMatt Arsenault <Matthew.Arsenault@amd.com>2024-09-24 08:32:47 +0400
committerGitHub <noreply@github.com>2024-09-24 08:32:47 +0400
commitb30b9eb7a8823c1b3bbcd1bf9452e743a17d9223 (patch)
treefb28923ad61712108865a4406db89227166feb03 /llvm/lib/CodeGen/MachineVerifier.cpp
parent0206181ada4b39f0324dfe977442c65c1693f0b1 (diff)
downloadllvm-b30b9eb7a8823c1b3bbcd1bf9452e743a17d9223.zip
llvm-b30b9eb7a8823c1b3bbcd1bf9452e743a17d9223.tar.gz
llvm-b30b9eb7a8823c1b3bbcd1bf9452e743a17d9223.tar.bz2
LiveInterval: Make verify functions return bool (#109672)
This will allow the MachineVerifier to check these properties instead of just asserting
Diffstat (limited to 'llvm/lib/CodeGen/MachineVerifier.cpp')
-rw-r--r--llvm/lib/CodeGen/MachineVerifier.cpp18
1 files changed, 18 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/MachineVerifier.cpp b/llvm/lib/CodeGen/MachineVerifier.cpp
index 2766420..e1295ec8 100644
--- a/llvm/lib/CodeGen/MachineVerifier.cpp
+++ b/llvm/lib/CodeGen/MachineVerifier.cpp
@@ -2758,6 +2758,15 @@ void MachineVerifier::checkLivenessAtUse(const MachineOperand *MO,
Register VRegOrUnit,
LaneBitmask LaneMask) {
const MachineInstr *MI = MO->getParent();
+
+ if (!LR.verify()) {
+ report("invalid live range", MO, MONum);
+ report_context_liverange(LR);
+ report_context_vreg_regunit(VRegOrUnit);
+ report_context(UseIdx);
+ return;
+ }
+
LiveQueryResult LRQ = LR.Query(UseIdx);
bool HasValue = LRQ.valueIn() || (MI->isPHI() && LRQ.valueOut());
// Check if we have a segment at the use, note however that we only need one
@@ -2784,6 +2793,15 @@ void MachineVerifier::checkLivenessAtDef(const MachineOperand *MO,
Register VRegOrUnit,
bool SubRangeCheck,
LaneBitmask LaneMask) {
+ if (!LR.verify()) {
+ report("invalid live range", MO, MONum);
+ report_context_liverange(LR);
+ report_context_vreg_regunit(VRegOrUnit);
+ if (LaneMask.any())
+ report_context_lanemask(LaneMask);
+ report_context(DefIdx);
+ }
+
if (const VNInfo *VNI = LR.getVNInfoAt(DefIdx)) {
// The LR can correspond to the whole reg and its def slot is not obliged
// to be the same as the MO' def slot. E.g. when we check here "normal"