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| author | Justin Hibbits <jrh29@alumni.cwru.edu> | 2020-04-08 21:29:40 -0500 |
|---|---|---|
| committer | Justin Hibbits <jrh29@alumni.cwru.edu> | 2020-07-31 22:52:47 -0500 |
| commit | 7e9153e940e21a937ff3a0e7425eb1b24bd1bb76 (patch) | |
| tree | 2e77102707c7152af9c344e5371fe362fc4ecf59 /llvm/lib/CodeGen/MachineVerifier.cpp | |
| parent | 914dbf4808d46632cc7b8dda861a11f978083416 (diff) | |
| download | llvm-7e9153e940e21a937ff3a0e7425eb1b24bd1bb76.zip llvm-7e9153e940e21a937ff3a0e7425eb1b24bd1bb76.tar.gz llvm-7e9153e940e21a937ff3a0e7425eb1b24bd1bb76.tar.bz2 | |
PowerPC: Don't lower SELECT_CC to PPCISD::FSEL on SPE
SPE doesn't have a fsel instruction, so don't try to lower to it.
This fixes a "Cannot select: tN: f64 = PPCISD::FSEL tX, tY, tZ" error.
Reviewed By: #powerpc, lkail
Differential Revision: https://reviews.llvm.org/D77773
Diffstat (limited to 'llvm/lib/CodeGen/MachineVerifier.cpp')
0 files changed, 0 insertions, 0 deletions