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authorRamkumar Ramachandra <Ramkumar.Ramachandra@imgtec.com>2023-05-18 10:22:14 +0100
committerRamkumar Ramachandra <Ramkumar.Ramachandra@imgtec.com>2023-05-18 12:11:43 +0100
commitb4038fb72f0ad1d45668db401f494124b8fe79f9 (patch)
treef4af13469474651d062b51b57b8fb0f37cb83afc /llvm/lib/CodeGen/MachineTraceMetrics.cpp
parentc01937296b01f512e9074730e04ad0bedb40d089 (diff)
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MachineTraceMetrics: modernize loops (NFC)
Differential Revision: https://reviews.llvm.org/D150854
Diffstat (limited to 'llvm/lib/CodeGen/MachineTraceMetrics.cpp')
-rw-r--r--llvm/lib/CodeGen/MachineTraceMetrics.cpp14
1 files changed, 5 insertions, 9 deletions
diff --git a/llvm/lib/CodeGen/MachineTraceMetrics.cpp b/llvm/lib/CodeGen/MachineTraceMetrics.cpp
index 62a114df..2254c84 100644
--- a/llvm/lib/CodeGen/MachineTraceMetrics.cpp
+++ b/llvm/lib/CodeGen/MachineTraceMetrics.cpp
@@ -1099,10 +1099,7 @@ computeInstrHeights(const MachineBasicBlock *MBB) {
}
// Go through the block backwards.
- for (MachineBasicBlock::const_iterator BI = MBB->end(), BB = MBB->begin();
- BI != BB;) {
- const MachineInstr &MI = *--BI;
-
+ for (const MachineInstr &MI : reverse(*MBB)) {
// Find the MI height as determined by virtual register uses in the
// trace below.
unsigned Cycle = 0;
@@ -1149,11 +1146,10 @@ computeInstrHeights(const MachineBasicBlock *MBB) {
}
// Transfer the live regunits to the live-in list.
- for (SparseSet<LiveRegUnit>::const_iterator
- RI = RegUnits.begin(), RE = RegUnits.end(); RI != RE; ++RI) {
- TBI.LiveIns.push_back(LiveInReg(RI->RegUnit, RI->Cycle));
- LLVM_DEBUG(dbgs() << ' ' << printRegUnit(RI->RegUnit, MTM.TRI) << '@'
- << RI->Cycle);
+ for (const LiveRegUnit &RU : RegUnits) {
+ TBI.LiveIns.push_back(LiveInReg(RU.RegUnit, RU.Cycle));
+ LLVM_DEBUG(dbgs() << ' ' << printRegUnit(RU.RegUnit, MTM.TRI) << '@'
+ << RU.Cycle);
}
LLVM_DEBUG(dbgs() << '\n');