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author | David Spickett <david.spickett@linaro.org> | 2023-02-13 14:48:02 +0000 |
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committer | David Spickett <david.spickett@linaro.org> | 2023-02-14 11:25:30 +0000 |
commit | 94676cf8a13c511a9acfc24ed53c98964a87bde3 (patch) | |
tree | 1d9945a6d26a48281fe1e158a2810c77bdb76e28 /llvm/lib/CodeGen/MachineTraceMetrics.cpp | |
parent | ebc21c7a2558b470765ab6f96c0544a5e602660a (diff) | |
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[llvm][AArch64] Fix an interaction of SLS and BTI after a returns twice call
This fixes the combination of two things:
* Placing a BTI after calls to a returns twice function like setjmp.
This allows the setjmp to return with a br instead of a ret.
* Straight line speculation mitigations that replace BLR with a BL
to a thunk that does the mitigation, and then goes to the original
target.
Originally I marked AArch64call_bti as requiring that SLS mitigation
be disabled. This caused a crash when you tried to codegen with both.
Since CALL_BTI tried to match with AArch64call_bti but could not.
This change does 2 things:
* Follow the pattern set by AArch64call and add 2 patterns for
AArch64call_bti. One with no IP (interprocedural) registers,
and one with. For SLS mitigation on and off respectively.
* Modify the sls hardening pass to iterate through bundled
instructions, as the AArch64 KCFI pass does.
Since there is a 1:1 replacement of the BLR with a BL,
the bundle remains intact. This is checked with an MIR test.
The ir -> asm testing is updated to add runs with the sls
mitigation enabled.
Reviewed By: kristof.beyls, pzheng
Differential Revision: https://reviews.llvm.org/D143915
Diffstat (limited to 'llvm/lib/CodeGen/MachineTraceMetrics.cpp')
0 files changed, 0 insertions, 0 deletions