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authorJeremy Morse <jeremy.morse@sony.com>2019-10-31 12:33:18 +0000
committerJeremy Morse <jeremy.morse@sony.com>2019-10-31 12:39:06 +0000
commitd382a8a768b3636c5aa1a934977c54d0215633cf (patch)
tree10838904feb4ea5b9ec7d026659b35afcf60059a /llvm/lib/CodeGen/MachineSink.cpp
parent733777a81662c40960e9298bb59da8c39a14f8d5 (diff)
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Revert "[DebugInfo] MachineSink: find more DBG_VALUEs to sink"
This reverts commit f5e1b718a675a4449b71423f04d38e1e93045105. PR43855 reports a performance regression with commit ee50590e. This commit depends on the faulty one, so has to come out too.
Diffstat (limited to 'llvm/lib/CodeGen/MachineSink.cpp')
-rw-r--r--llvm/lib/CodeGen/MachineSink.cpp101
1 files changed, 15 insertions, 86 deletions
diff --git a/llvm/lib/CodeGen/MachineSink.cpp b/llvm/lib/CodeGen/MachineSink.cpp
index 81fd30c..4c55158a 100644
--- a/llvm/lib/CodeGen/MachineSink.cpp
+++ b/llvm/lib/CodeGen/MachineSink.cpp
@@ -105,9 +105,6 @@ namespace {
using AllSuccsCache =
std::map<MachineBasicBlock *, SmallVector<MachineBasicBlock *, 4>>;
- // Remember debug uses of vregs seen, so we know what to sink out of blocks.
- DenseMap<unsigned, TinyPtrVector<MachineInstr *>> SeenDbgUsers;
-
public:
static char ID; // Pass identification
@@ -135,7 +132,6 @@ namespace {
private:
bool ProcessBlock(MachineBasicBlock &MBB);
- void ProcessDbgInst(MachineInstr &MI);
bool isWorthBreakingCriticalEdge(MachineInstr &MI,
MachineBasicBlock *From,
MachineBasicBlock *To);
@@ -157,14 +153,8 @@ namespace {
MachineBasicBlock *To,
bool BreakPHIEdge);
bool SinkInstruction(MachineInstr &MI, bool &SawStore,
- AllSuccsCache &AllSuccessors);
- /// If we sink a COPY inst, some debug users of it's destination may no
- /// longer be dominated by the COPY, and will eventually be dropped.
- /// This is easily rectified by forwarding the non-dominated debug uses
- /// to the copy source.
- void SalvageUnsunkDebugUsersOfCopy(MachineInstr &,
- MachineBasicBlock *TargetBlock);
+ AllSuccsCache &AllSuccessors);
bool AllUsesDominatedByBlock(unsigned Reg, MachineBasicBlock *MBB,
MachineBasicBlock *DefMBB,
bool &BreakPHIEdge, bool &LocalUse) const;
@@ -377,11 +367,8 @@ bool MachineSinking::ProcessBlock(MachineBasicBlock &MBB) {
if (!ProcessedBegin)
--I;
- if (MI.isDebugInstr()) {
- if (MI.isDebugValue())
- ProcessDbgInst(MI);
+ if (MI.isDebugInstr())
continue;
- }
bool Joined = PerformTrivialForwardCoalescing(MI, &MBB);
if (Joined) {
@@ -397,23 +384,9 @@ bool MachineSinking::ProcessBlock(MachineBasicBlock &MBB) {
// If we just processed the first instruction in the block, we're done.
} while (!ProcessedBegin);
- SeenDbgUsers.clear();
-
return MadeChange;
}
-void MachineSinking::ProcessDbgInst(MachineInstr &MI) {
- // When we see DBG_VALUEs for registers, record any vreg it reads, so that
- // we know what to sink if the vreg def sinks.
- assert(MI.isDebugValue() && "Expected DBG_VALUE for processing");
-
- MachineOperand &MO = MI.getOperand(0);
- if (!MO.isReg() || !MO.getReg().isVirtual())
- return;
-
- SeenDbgUsers[MO.getReg()].push_back(&MI);
-}
-
bool MachineSinking::isWorthBreakingCriticalEdge(MachineInstr &MI,
MachineBasicBlock *From,
MachineBasicBlock *To) {
@@ -758,13 +731,22 @@ static bool SinkingPreventsImplicitNullCheck(MachineInstr &MI,
MBP.LHS.getReg() == BaseOp->getReg();
}
-/// Sink an instruction and its associated debug instructions.
+/// Sink an instruction and its associated debug instructions. If the debug
+/// instructions to be sunk are already known, they can be provided in DbgVals.
static void performSink(MachineInstr &MI, MachineBasicBlock &SuccToSinkTo,
MachineBasicBlock::iterator InsertPos,
- SmallVectorImpl<MachineInstr *> &DbgValuesToSink) {
+ SmallVectorImpl<MachineInstr *> *DbgVals = nullptr) {
const MachineRegisterInfo &MRI = MI.getMF()->getRegInfo();
const TargetInstrInfo &TII = *MI.getMF()->getSubtarget().getInstrInfo();
+ // If debug values are provided use those, otherwise call collectDebugValues.
+ SmallVector<MachineInstr *, 2> DbgValuesToSink;
+ if (DbgVals)
+ DbgValuesToSink.insert(DbgValuesToSink.begin(),
+ DbgVals->begin(), DbgVals->end());
+ else
+ MI.collectDebugValues(DbgValuesToSink);
+
// If we cannot find a location to use (merge with), then we erase the debug
// location to prevent debug-info driven tools from potentially reporting
// wrong location information.
@@ -947,25 +929,7 @@ bool MachineSinking::SinkInstruction(MachineInstr &MI, bool &SawStore,
while (InsertPos != SuccToSinkTo->end() && InsertPos->isPHI())
++InsertPos;
- // Collect debug users of any vreg that this inst defines.
- SmallVector<MachineInstr *, 4> DbgUsersToSink;
- for (auto &MO : MI.operands()) {
- if (!MO.isReg() || !MO.isDef() || !MO.getReg().isVirtual())
- continue;
- if (!SeenDbgUsers.count(MO.getReg()))
- continue;
-
- auto &Users = SeenDbgUsers[MO.getReg()];
- DbgUsersToSink.insert(DbgUsersToSink.end(), Users.begin(), Users.end());
- }
-
- // After sinking, some debug users may not be dominated any more. If possible,
- // copy-propagate their operands. As it's expensive, don't do this if there's
- // no debuginfo in the program.
- if (MI.getMF()->getFunction().getSubprogram() && MI.isCopy())
- SalvageUnsunkDebugUsersOfCopy(MI, SuccToSinkTo);
-
- performSink(MI, *SuccToSinkTo, InsertPos, DbgUsersToSink);
+ performSink(MI, *SuccToSinkTo, InsertPos);
// Conservatively, clear any kill flags, since it's possible that they are no
// longer correct.
@@ -980,41 +944,6 @@ bool MachineSinking::SinkInstruction(MachineInstr &MI, bool &SawStore,
return true;
}
-void MachineSinking::SalvageUnsunkDebugUsersOfCopy(
- MachineInstr &MI, MachineBasicBlock *TargetBlock) {
- assert(MI.isCopy());
- assert(MI.getOperand(1).isReg());
-
- // Enumerate all users of vreg operands that are def'd. Skip those that will
- // be sunk. For the rest, if they are not dominated by the block we will sink
- // MI into, propagate the copy source to them.
- SmallVector<MachineInstr *, 4> DbgDefUsers;
- const MachineRegisterInfo &MRI = MI.getMF()->getRegInfo();
- for (auto &MO : MI.operands()) {
- if (!MO.isReg() || !MO.isDef() || !MO.getReg().isVirtual())
- continue;
- for (auto &User : MRI.use_instructions(MO.getReg())) {
- if (!User.isDebugValue() || DT->dominates(TargetBlock, User.getParent()))
- continue;
-
- // If is in same block, will either sink or be use-before-def.
- if (User.getParent() == MI.getParent())
- continue;
-
- assert(User.getOperand(0).isReg() &&
- "DBG_VALUE user of vreg, but non reg operand?");
- DbgDefUsers.push_back(&User);
- }
- }
-
- // Point the users of this copy that are no longer dominated, at the source
- // of the copy.
- for (auto *User : DbgDefUsers) {
- User->getOperand(0).setReg(MI.getOperand(1).getReg());
- User->getOperand(0).setSubReg(MI.getOperand(1).getSubReg());
- }
-}
-
//===----------------------------------------------------------------------===//
// This pass is not intended to be a replacement or a complete alternative
// for the pre-ra machine sink pass. It is only designed to sink COPY
@@ -1324,7 +1253,7 @@ bool PostRAMachineSinking::tryToSinkCopy(MachineBasicBlock &CurBB,
// block.
clearKillFlags(MI, CurBB, UsedOpsInCopy, UsedRegUnits, TRI);
MachineBasicBlock::iterator InsertPos = SuccBB->getFirstNonPHI();
- performSink(*MI, *SuccBB, InsertPos, DbgValsToSink);
+ performSink(*MI, *SuccBB, InsertPos, &DbgValsToSink);
updateLiveIn(MI, SuccBB, UsedOpsInCopy, DefedRegsInCopy);
Changed = true;