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authorMarkus Lavin <markus.lavin@ericsson.com>2021-11-11 15:27:15 +0100
committerMarkus Lavin <markus.lavin@ericsson.com>2021-11-12 08:01:13 +0100
commit4e94e25c9024d01451e318fe48aee79b615e9c2b (patch)
tree0074b175d501b750a8e8141914a88f1bd6740d55 /llvm/lib/CodeGen/MachineSink.cpp
parentc265170110b2e3b82ab8fca6658bfbbce79381c5 (diff)
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Fix minor deficiency in machine-sink.
Register uses that are MRI->isConstantPhysReg() should not inhibit sinking transformation. Reviewed By: StephenTozer Differential Revision: https://reviews.llvm.org/D111531
Diffstat (limited to 'llvm/lib/CodeGen/MachineSink.cpp')
-rw-r--r--llvm/lib/CodeGen/MachineSink.cpp3
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/MachineSink.cpp b/llvm/lib/CodeGen/MachineSink.cpp
index 4ea8bb4..30745c7 100644
--- a/llvm/lib/CodeGen/MachineSink.cpp
+++ b/llvm/lib/CodeGen/MachineSink.cpp
@@ -1324,7 +1324,8 @@ bool MachineSinking::SinkInstruction(MachineInstr &MI, bool &SawStore,
// "zombie" define of that preg. E.g., EFLAGS. (<rdar://problem/8030636>)
for (unsigned I = 0, E = MI.getNumOperands(); I != E; ++I) {
const MachineOperand &MO = MI.getOperand(I);
- if (!MO.isReg()) continue;
+ if (!MO.isReg() || MO.isUse())
+ continue;
Register Reg = MO.getReg();
if (Reg == 0 || !Register::isPhysicalRegister(Reg))
continue;