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authorMatt Arsenault <Matthew.Arsenault@amd.com>2023-07-14 11:05:24 -0400
committerMatt Arsenault <Matthew.Arsenault@amd.com>2023-07-18 06:15:50 -0400
commit3f8ef57bede94445b1a1042c987cc914a886e7ff (patch)
treed9bbfee859f349a0a7ee3b9309e63bfa855fbfc9 /llvm/lib/CodeGen/MachineSink.cpp
parentd5ab379506252f4955c74841f1e12caa97317a57 (diff)
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MachineSink: Fix sinking VGPR def out of a divergent loop
This fixes sinking a VGPR def out of a loop past the reconvergence point at the SI_END_CF. There was a prior fix which introduced blockPrologueInterferes (D121277) to fix the same basic problem for the post RA sink. This also had the special case isIgnorableUse case which was incorrect, because in some contexts the exec use is not ignorable. I'm thinking about a new way to represent this which will avoid needing hasIgnorableUse and isBasicBlockPrologue, which would function more like the exception handling. Fixes: SWDEV-407790 https://reviews.llvm.org/D155343
Diffstat (limited to 'llvm/lib/CodeGen/MachineSink.cpp')
-rw-r--r--llvm/lib/CodeGen/MachineSink.cpp15
1 files changed, 11 insertions, 4 deletions
diff --git a/llvm/lib/CodeGen/MachineSink.cpp b/llvm/lib/CodeGen/MachineSink.cpp
index 3b0166e..8da97dc 100644
--- a/llvm/lib/CodeGen/MachineSink.cpp
+++ b/llvm/lib/CodeGen/MachineSink.cpp
@@ -288,8 +288,7 @@ static bool blockPrologueInterferes(const MachineBasicBlock *BB,
if (!Reg)
continue;
if (MO.isUse()) {
- if (Reg.isPhysical() &&
- (TII->isIgnorableUse(MO) || (MRI && MRI->isConstantPhysReg(Reg))))
+ if (Reg.isPhysical() && MRI && MRI->isConstantPhysReg(Reg))
continue;
if (PI->modifiesRegister(Reg, TRI))
return true;
@@ -1007,16 +1006,24 @@ MachineSinking::FindSuccToSinkTo(MachineInstr &MI, MachineBasicBlock *MBB,
if (MBB == SuccToSinkTo)
return nullptr;
+ if (!SuccToSinkTo)
+ return nullptr;
+
// It's not safe to sink instructions to EH landing pad. Control flow into
// landing pad is implicitly defined.
- if (SuccToSinkTo && SuccToSinkTo->isEHPad())
+ if (SuccToSinkTo->isEHPad())
return nullptr;
// It ought to be okay to sink instructions into an INLINEASM_BR target, but
// only if we make sure that MI occurs _before_ an INLINEASM_BR instruction in
// the source block (which this code does not yet do). So for now, forbid
// doing so.
- if (SuccToSinkTo && SuccToSinkTo->isInlineAsmBrIndirectTarget())
+ if (SuccToSinkTo->isInlineAsmBrIndirectTarget())
+ return nullptr;
+
+ MachineBasicBlock::const_iterator InsertPos =
+ SuccToSinkTo->SkipPHIsAndLabels(SuccToSinkTo->begin());
+ if (blockPrologueInterferes(SuccToSinkTo, InsertPos, MI, TRI, TII, MRI))
return nullptr;
return SuccToSinkTo;