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| author | Luo, Yuanke <yuanke.luo@intel.com> | 2022-06-15 19:03:18 +0800 |
|---|---|---|
| committer | Luo, Yuanke <yuanke.luo@intel.com> | 2022-06-15 23:35:52 +0800 |
| commit | 16547f9fbbd56c7b8256b6eea1ccd8b1547ef4e5 (patch) | |
| tree | 16828fd91f9f44afa1c5e2f2770937c03c8ca928 /llvm/lib/CodeGen/MachineSink.cpp | |
| parent | 929e60b6bd2f463321b6e98db85a3d9c89236996 (diff) | |
| download | llvm-16547f9fbbd56c7b8256b6eea1ccd8b1547ef4e5.zip llvm-16547f9fbbd56c7b8256b6eea1ccd8b1547ef4e5.tar.gz llvm-16547f9fbbd56c7b8256b6eea1ccd8b1547ef4e5.tar.bz2 | |
[CodeGen] Fix the bug of machine sink
The use operand may be undefined. In that case we can just continue to
check the next operand since it won't increase register pressure.
Differential Revision: https://reviews.llvm.org/D127848
Diffstat (limited to 'llvm/lib/CodeGen/MachineSink.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/MachineSink.cpp | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/MachineSink.cpp b/llvm/lib/CodeGen/MachineSink.cpp index 797433e..96d575f 100644 --- a/llvm/lib/CodeGen/MachineSink.cpp +++ b/llvm/lib/CodeGen/MachineSink.cpp @@ -823,6 +823,8 @@ bool MachineSinking::isProfitableToSinkTo(Register Reg, MachineInstr &MI, return false; } else { MachineInstr *DefMI = MRI->getVRegDef(Reg); + if (!DefMI) + continue; MachineCycle *Cycle = CI->getCycle(DefMI->getParent()); // DefMI is defined outside of cycle. There should be no live range // impact for this operand. Defination outside of cycle means: |