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authorVang Thao <vang.thao@amd.com>2022-01-18 13:53:41 +0000
committerVang Thao <vang.thao@amd.com>2022-01-18 14:17:40 +0000
commit10ed1eca241f893085b8db40138e588e72aaee3a (patch)
tree336e817e35728cc7c2e2ee5c4564a6e16e0c9106 /llvm/lib/CodeGen/MachineSink.cpp
parent67ac3f1fbeec6ac53a2e32014fe277e49c77b182 (diff)
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[MachineSink] Allow sinking of constant or ignorable physreg uses
For AMDGPU, any use of the physical register EXEC prevents sinking even if it is not a real physical register read. Add check to see if a physical register use can be ignored for sinking. Also perform same constant and ignorable physical register check when considering sinking in loops. https://reviews.llvm.org/D116053
Diffstat (limited to 'llvm/lib/CodeGen/MachineSink.cpp')
-rw-r--r--llvm/lib/CodeGen/MachineSink.cpp11
1 files changed, 8 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/MachineSink.cpp b/llvm/lib/CodeGen/MachineSink.cpp
index 54c4786..0dbbc21 100644
--- a/llvm/lib/CodeGen/MachineSink.cpp
+++ b/llvm/lib/CodeGen/MachineSink.cpp
@@ -796,9 +796,14 @@ bool MachineSinking::isProfitableToSinkTo(Register Reg, MachineInstr &MI,
if (Reg == 0)
continue;
- // Don't handle physical register.
- if (Register::isPhysicalRegister(Reg))
+ if (Register::isPhysicalRegister(Reg)) {
+ if (MO.isUse() &&
+ (MRI->isConstantPhysReg(Reg) || TII->isIgnorableUse(MO)))
+ continue;
+
+ // Don't handle non-constant and non-ignorable physical register.
return false;
+ }
// Users for the defs are all dominated by SuccToSinkTo.
if (MO.isDef()) {
@@ -898,7 +903,7 @@ MachineSinking::FindSuccToSinkTo(MachineInstr &MI, MachineBasicBlock *MBB,
// If the physreg has no defs anywhere, it's just an ambient register
// and we can freely move its uses. Alternatively, if it's allocatable,
// it could get allocated to something with a def during allocation.
- if (!MRI->isConstantPhysReg(Reg))
+ if (!MRI->isConstantPhysReg(Reg) && !TII->isIgnorableUse(MO))
return nullptr;
} else if (!MO.isDead()) {
// A def that isn't dead. We can't move it.