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author | Michael Maitland <michaeltmaitland@gmail.com> | 2023-12-21 13:17:34 -0800 |
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committer | Michael Maitland <michaeltmaitland@gmail.com> | 2024-02-27 09:56:28 -0800 |
commit | f7cf1f6236ee299d65c2b33429c1d3b729f54c32 (patch) | |
tree | 278ec0ff1fb9e9e2cef08d8a41793a6599ae8d98 /llvm/lib/CodeGen/MachineScheduler.cpp | |
parent | c95febcb4008c40a2b514bd6e2b56e0aa17457a3 (diff) | |
download | llvm-f7cf1f6236ee299d65c2b33429c1d3b729f54c32.zip llvm-f7cf1f6236ee299d65c2b33429c1d3b729f54c32.tar.gz llvm-f7cf1f6236ee299d65c2b33429c1d3b729f54c32.tar.bz2 |
[CodeGen][MISched] dumpSched direction depends on field in DAG.
This is a precommit to supporting post reg-alloc bottom up scheduling.
We'd like to have post-ra scheduling direction that can be different from
pre-ra direction. The current dumpSchedule function is changed in this
patch to support the fact that the post-ra and pre-ra directions will
depend on different command line options.
Diffstat (limited to 'llvm/lib/CodeGen/MachineScheduler.cpp')
-rw-r--r-- | llvm/lib/CodeGen/MachineScheduler.cpp | 24 |
1 files changed, 21 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/MachineScheduler.cpp b/llvm/lib/CodeGen/MachineScheduler.cpp index 750f739..265d3ac 100644 --- a/llvm/lib/CodeGen/MachineScheduler.cpp +++ b/llvm/lib/CodeGen/MachineScheduler.cpp @@ -440,6 +440,14 @@ bool MachineScheduler::runOnMachineFunction(MachineFunction &mf) { // Instantiate the selected scheduler for this target, function, and // optimization level. std::unique_ptr<ScheduleDAGInstrs> Scheduler(createMachineScheduler()); + ScheduleDAGMI::DumpDirection Dir; + if (ForceTopDown) + Dir = ScheduleDAGMI::DumpDirection::TopDown; + else if (ForceBottomUp) + Dir = ScheduleDAGMI::DumpDirection::BottomUp; + else + Dir = ScheduleDAGMI::DumpDirection::Bidirectional; + Scheduler->setDumpDirection(Dir); scheduleRegions(*Scheduler, false); LLVM_DEBUG(LIS->dump()); @@ -473,6 +481,9 @@ bool PostMachineScheduler::runOnMachineFunction(MachineFunction &mf) { // Instantiate the selected scheduler for this target, function, and // optimization level. std::unique_ptr<ScheduleDAGInstrs> Scheduler(createPostMachineScheduler()); + Scheduler->setDumpDirection(PostRADirection == MISchedPostRASched::TopDown + ? ScheduleDAGMI::DumpDirection::TopDown + : ScheduleDAGMI::DumpDirection::BottomUp); scheduleRegions(*Scheduler, true); if (VerifyScheduling) @@ -1125,12 +1136,14 @@ LLVM_DUMP_METHOD void ScheduleDAGMI::dumpScheduleTraceBottomUp() const { #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) LLVM_DUMP_METHOD void ScheduleDAGMI::dumpSchedule() const { if (MISchedDumpScheduleTrace) { - if (ForceTopDown) + if (DumpDir == TopDown) dumpScheduleTraceTopDown(); - else if (ForceBottomUp) + else if (DumpDir == BottomUp) dumpScheduleTraceBottomUp(); - else { + else if (DumpDir == BottomUp) { dbgs() << "* Schedule table (Bidirectional): not implemented\n"; + } else { + dbgs() << "* Schedule table: DumpDirection not set.\n"; } } @@ -3842,6 +3855,11 @@ void PostGenericScheduler::initialize(ScheduleDAGMI *Dag) { DAG->MF.getSubtarget().getInstrInfo()->CreateTargetMIHazardRecognizer( Itin, DAG); } + if (!Bot.HazardRec) { + Bot.HazardRec = + DAG->MF.getSubtarget().getInstrInfo()->CreateTargetMIHazardRecognizer( + Itin, DAG); + } } void PostGenericScheduler::registerRoots() { |