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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2020-01-28 16:09:12 -0500 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2020-01-29 07:49:39 -0800 |
| commit | f717483acd5e7d278ecd54ae80d2c1138fb51d06 (patch) | |
| tree | af0b742efcc8ef07708323e9c24b63bdad7c2e04 /llvm/lib/CodeGen/MachineScheduler.cpp | |
| parent | 752e2e245ab6bfb6203c226bbe295ddf4e018830 (diff) | |
| download | llvm-f717483acd5e7d278ecd54ae80d2c1138fb51d06.zip llvm-f717483acd5e7d278ecd54ae80d2c1138fb51d06.tar.gz llvm-f717483acd5e7d278ecd54ae80d2c1138fb51d06.tar.bz2 | |
GlobalISel: Assert on invalid bitcast in MIRBuilder
The other casts validate, so this should too.
Diffstat (limited to 'llvm/lib/CodeGen/MachineScheduler.cpp')
0 files changed, 0 insertions, 0 deletions