diff options
| author | Simon Dardis <simon.dardis@mips.com> | 2017-12-14 14:55:25 +0000 |
|---|---|---|
| committer | Simon Dardis <simon.dardis@mips.com> | 2017-12-14 14:55:25 +0000 |
| commit | e94fdd125fdd7141d5c1ee54d69a7c4dccef07ee (patch) | |
| tree | 60d9ed68606d42add80b5e27e7b69c801e0025dc /llvm/lib/CodeGen/MachineScheduler.cpp | |
| parent | 33eaf177024e6b3126fa05043e229abf1579fd20 (diff) | |
| download | llvm-e94fdd125fdd7141d5c1ee54d69a7c4dccef07ee.zip llvm-e94fdd125fdd7141d5c1ee54d69a7c4dccef07ee.tar.gz llvm-e94fdd125fdd7141d5c1ee54d69a7c4dccef07ee.tar.bz2 | |
[mips] Add partial support for R6 in the long branch pass
MIPSR6 introduced several new jump instructions and deprecated
the use of the 'j' instruction. For microMIPS32R6, 'j' was removed
entirely and it only has non delay slot jumps.
This patch adds support for MIPSR6 by using some R6 instructions--
'bc' instead of 'j', 'jic $reg, 0' instead of 'jalr $zero, $reg'--
and modifies the sequences not to use delay slots for R6.
Reviewers: atanasyan
Reviewed By: atanasyan
Subscribers: dschuff, arichardson, llvm-commits
Differential Revision: https://reviews.llvm.org/D40786
llvm-svn: 320703
Diffstat (limited to 'llvm/lib/CodeGen/MachineScheduler.cpp')
0 files changed, 0 insertions, 0 deletions