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| author | Sam Kolton <Sam.Kolton@amd.com> | 2016-03-09 12:29:31 +0000 |
|---|---|---|
| committer | Sam Kolton <Sam.Kolton@amd.com> | 2016-03-09 12:29:31 +0000 |
| commit | dfa29f7c5bfc45bcc9a31bb113b1519d1332b6a6 (patch) | |
| tree | 5f7e7d7ac194e0510028d40818e6a734cff259f5 /llvm/lib/CodeGen/MachineScheduler.cpp | |
| parent | 10d6f9ac0403710fefaee324bfccd2a01e41a6c3 (diff) | |
| download | llvm-dfa29f7c5bfc45bcc9a31bb113b1519d1332b6a6.zip llvm-dfa29f7c5bfc45bcc9a31bb113b1519d1332b6a6.tar.gz llvm-dfa29f7c5bfc45bcc9a31bb113b1519d1332b6a6.tar.bz2 | |
[AMDGPU] Assembler: Support DPP instructions.
Supprot DPP syntax as used in SP3 (except several operands syntax).
Added dpp-specific operands in td-files.
Added DPP flag to TSFlags to determine if instruction is dpp in InstPrinter.
Support for VOP2 DPP instructions in td-files.
Some tests for DPP instructions.
ToDo:
- VOP2bInst:
- vcc is considered as operand
- AsmMatcher doesn't apply mnemonic aliases when parsing operands
- v_mac_f32
- v_nop
- disable instructions with 64-bit operands
- change dpp_ctrl assembler representation to conform sp3
Review: http://reviews.llvm.org/D17804
llvm-svn: 263008
Diffstat (limited to 'llvm/lib/CodeGen/MachineScheduler.cpp')
0 files changed, 0 insertions, 0 deletions