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author | Ivan Butygin <ivan.butygin@gmail.com> | 2025-04-18 16:19:04 +0200 |
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committer | GitHub <noreply@github.com> | 2025-04-18 17:19:04 +0300 |
commit | dda4b968e77e1bb2c319bf2d523de3b5c4ccbb23 (patch) | |
tree | 93abc285d3d9039fdc7cc6193017bef9ba602457 /llvm/lib/CodeGen/MachineScheduler.cpp | |
parent | b1b065f2bf5d626fee277d67b0014577f7e4e499 (diff) | |
download | llvm-dda4b968e77e1bb2c319bf2d523de3b5c4ccbb23.zip llvm-dda4b968e77e1bb2c319bf2d523de3b5c4ccbb23.tar.gz llvm-dda4b968e77e1bb2c319bf2d523de3b5c4ccbb23.tar.bz2 |
[mlir] AMDGPUToROCDL: lower `amdgpu.swizzle_bitmode` (#136223)
Repack `amdgpu.swizzle_bitmode` arguments and lower it to
`rocdl.ds_swizzle`.
Repacking logic is follows:
* `sizeof(arg) < sizeof(i32)`: bitcast to integer and zext to i32 and
then trunc and bitcast back.
* `sizeof(arg) == sizeof(i32)`: just bitcast to i32 and back if not i32
* `sizeof(arg) > sizeof(i32)`: bitcast to `vector<Nxi32>`, extract
individual elements and do a series of `rocdl.ds_swizzle` and then
compose vector and bitcast back.
Added repacking logic to LLVM utils so it can be used elsewhere. I'm
planning to use it for `gpu.shuffle` later.
Diffstat (limited to 'llvm/lib/CodeGen/MachineScheduler.cpp')
0 files changed, 0 insertions, 0 deletions