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authorFrancis Visoiu Mistrih <francisvm@yahoo.com>2018-11-28 12:00:20 +0000
committerFrancis Visoiu Mistrih <francisvm@yahoo.com>2018-11-28 12:00:20 +0000
commitd7eebd6d831fa80c3840f10120c235db65f650da (patch)
tree367e04b77cabbb887e7e18a20c86dc0f6245af2b /llvm/lib/CodeGen/MachineScheduler.cpp
parentdda6290f16075795a5700c29d1b990fff8e1261b (diff)
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[CodeGen][NFC] Make `TII::getMemOpBaseImmOfs` return a base operand
Currently, instructions doing memory accesses through a base operand that is not a register can not be analyzed using `TII::getMemOpBaseRegImmOfs`. This means that functions such as `TII::shouldClusterMemOps` will bail out on instructions using an FI as a base instead of a register. The goal of this patch is to refactor all this to return a base operand instead of a base register. Then in a separate patch, I will add FI support to the mem op clustering in the MachineScheduler. Differential Revision: https://reviews.llvm.org/D54846 llvm-svn: 347746
Diffstat (limited to 'llvm/lib/CodeGen/MachineScheduler.cpp')
-rw-r--r--llvm/lib/CodeGen/MachineScheduler.cpp22
1 files changed, 11 insertions, 11 deletions
diff --git a/llvm/lib/CodeGen/MachineScheduler.cpp b/llvm/lib/CodeGen/MachineScheduler.cpp
index 3b163fa..e423c89 100644
--- a/llvm/lib/CodeGen/MachineScheduler.cpp
+++ b/llvm/lib/CodeGen/MachineScheduler.cpp
@@ -1483,15 +1483,15 @@ namespace {
class BaseMemOpClusterMutation : public ScheduleDAGMutation {
struct MemOpInfo {
SUnit *SU;
- unsigned BaseReg;
+ MachineOperand *BaseOp;
int64_t Offset;
- MemOpInfo(SUnit *su, unsigned reg, int64_t ofs)
- : SU(su), BaseReg(reg), Offset(ofs) {}
+ MemOpInfo(SUnit *su, MachineOperand *Op, int64_t ofs)
+ : SU(su), BaseOp(Op), Offset(ofs) {}
- bool operator<(const MemOpInfo&RHS) const {
- return std::tie(BaseReg, Offset, SU->NodeNum) <
- std::tie(RHS.BaseReg, RHS.Offset, RHS.SU->NodeNum);
+ bool operator<(const MemOpInfo &RHS) const {
+ return std::make_tuple(BaseOp->getReg(), Offset, SU->NodeNum) <
+ std::make_tuple(RHS.BaseOp->getReg(), RHS.Offset, RHS.SU->NodeNum);
}
};
@@ -1547,10 +1547,10 @@ void BaseMemOpClusterMutation::clusterNeighboringMemOps(
ArrayRef<SUnit *> MemOps, ScheduleDAGMI *DAG) {
SmallVector<MemOpInfo, 32> MemOpRecords;
for (SUnit *SU : MemOps) {
- unsigned BaseReg;
+ MachineOperand *BaseOp;
int64_t Offset;
- if (TII->getMemOpBaseRegImmOfs(*SU->getInstr(), BaseReg, Offset, TRI))
- MemOpRecords.push_back(MemOpInfo(SU, BaseReg, Offset));
+ if (TII->getMemOperandWithOffset(*SU->getInstr(), BaseOp, Offset, TRI))
+ MemOpRecords.push_back(MemOpInfo(SU, BaseOp, Offset));
}
if (MemOpRecords.size() < 2)
return;
@@ -1560,8 +1560,8 @@ void BaseMemOpClusterMutation::clusterNeighboringMemOps(
for (unsigned Idx = 0, End = MemOpRecords.size(); Idx < (End - 1); ++Idx) {
SUnit *SUa = MemOpRecords[Idx].SU;
SUnit *SUb = MemOpRecords[Idx+1].SU;
- if (TII->shouldClusterMemOps(*SUa->getInstr(), MemOpRecords[Idx].BaseReg,
- *SUb->getInstr(), MemOpRecords[Idx+1].BaseReg,
+ if (TII->shouldClusterMemOps(*MemOpRecords[Idx].BaseOp,
+ *MemOpRecords[Idx + 1].BaseOp,
ClusterLength) &&
DAG->addEdge(SUb, SDep(SUa, SDep::Cluster))) {
LLVM_DEBUG(dbgs() << "Cluster ld/st SU(" << SUa->NodeNum << ") - SU("