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| author | Francis Visoiu Mistrih <francisvm@yahoo.com> | 2017-12-14 10:03:14 +0000 |
|---|---|---|
| committer | Francis Visoiu Mistrih <francisvm@yahoo.com> | 2017-12-14 10:03:14 +0000 |
| commit | bdaf8bfa99830bad36c9833ca6a661294fb27577 (patch) | |
| tree | 578d5e8ffac8947f5141e51b8ca5cff12d89fc62 /llvm/lib/CodeGen/MachineScheduler.cpp | |
| parent | 5df3bbf3e637b8f9175e0f96e02aab0776f1d2f1 (diff) | |
| download | llvm-bdaf8bfa99830bad36c9833ca6a661294fb27577.zip llvm-bdaf8bfa99830bad36c9833ca6a661294fb27577.tar.gz llvm-bdaf8bfa99830bad36c9833ca6a661294fb27577.tar.bz2 | |
[CodeGen] Print live-out register lists as liveout(...) in both MIR and debug output
Work towards the unification of MIR and debug output by printing
`liveout(...)` instead of `<regliveout>`.
Only debug syntax is affected.
llvm-svn: 320683
Diffstat (limited to 'llvm/lib/CodeGen/MachineScheduler.cpp')
0 files changed, 0 insertions, 0 deletions