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| author | Zi Xuan Wu <wuzish@cn.ibm.com> | 2019-01-09 02:31:10 +0000 |
|---|---|---|
| committer | Zi Xuan Wu <wuzish@cn.ibm.com> | 2019-01-09 02:31:10 +0000 |
| commit | 9479f6d72e7d148aa1783bf229416e55791b09e9 (patch) | |
| tree | 0c136934dd86b963353806b4d8804b852b014880 /llvm/lib/CodeGen/MachineScheduler.cpp | |
| parent | ed0d6c60afd8a9007862b3ca0f69dd42cfcfc357 (diff) | |
| download | llvm-9479f6d72e7d148aa1783bf229416e55791b09e9.zip llvm-9479f6d72e7d148aa1783bf229416e55791b09e9.tar.gz llvm-9479f6d72e7d148aa1783bf229416e55791b09e9.tar.bz2 | |
[PowerPC] Fix assert from machine verify pass that unmatched register class about fcmp selection in fast-isel
Bad machine code: Illegal virtual register for instruction
function: TestULE
basic block: %bb.0 entry (0x1000a39b158)
instruction: %2:crrc = FCMPUD %1:vsfrc, %3:f8rc
operand 1: %1:vsfrc
Fix assert about missing match between fcmp instruction and register class.
We should use vsx related cmp instruction xvcmpudp instead of fcmpu when vsx is opened.
add -verifymachineinstrs option into related test cases to enable the verify pass.
Differential Revision: https://reviews.llvm.org/D55686
llvm-svn: 350685
Diffstat (limited to 'llvm/lib/CodeGen/MachineScheduler.cpp')
0 files changed, 0 insertions, 0 deletions