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| author | Valentin Clement <clementval@gmail.com> | 2020-09-18 11:52:02 -0400 |
|---|---|---|
| committer | clementval <clementval@gmail.com> | 2020-09-18 11:52:24 -0400 |
| commit | 88a1d402d6c60aa182b9d83d39c9e3ab46a830c0 (patch) | |
| tree | 5b4f57b0d87ff4f2c55b75a0d03776185eba27c8 /llvm/lib/CodeGen/MachineScheduler.cpp | |
| parent | 22dde1f92f68b4249dbae30c119972a17753236a (diff) | |
| download | llvm-88a1d402d6c60aa182b9d83d39c9e3ab46a830c0.zip llvm-88a1d402d6c60aa182b9d83d39c9e3ab46a830c0.tar.gz llvm-88a1d402d6c60aa182b9d83d39c9e3ab46a830c0.tar.bz2 | |
[mlir][openacc] Add missing operands for acc.data operation
Add missing operands to represent copyin with readonly modifier, copyout with zero modifier
and create with zero modifier.
Reviewed By: ftynse
Differential Revision: https://reviews.llvm.org/D87874
Diffstat (limited to 'llvm/lib/CodeGen/MachineScheduler.cpp')
0 files changed, 0 insertions, 0 deletions