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| author | Daniel Kiss <daniel.kiss@arm.com> | 2020-06-09 19:56:30 +0200 |
|---|---|---|
| committer | Daniel Kiss <daniel.kiss@arm.com> | 2020-06-09 19:57:02 +0200 |
| commit | 7a38618a20596e419abbbbb249300e812763a028 (patch) | |
| tree | 4e2ea7184b69e48074ff8deeb8aac901058a94cf /llvm/lib/CodeGen/MachineScheduler.cpp | |
| parent | cb2d8b30ad0dc08bb151b922f5a137014ef9fc87 (diff) | |
| download | llvm-7a38618a20596e419abbbbb249300e812763a028.zip llvm-7a38618a20596e419abbbbb249300e812763a028.tar.gz llvm-7a38618a20596e419abbbbb249300e812763a028.tar.bz2 | |
[AArch64] Allow BTI mnemonics in the HINT space with BTI disabled
Summary:
It is important to emit HINT instructions instead of BTI ones when
BTI is disabled. This allows compatibility with other assemblers
(e.g. GAS).
Still, developers of assembly code will want to write code that is
compatible with both pre- and post-BTI CPUs. They could use HINT
mnemonics, but the new mnemonics are a lot more readable (e.g.
bti c instead of hint #34), and they will result in the same
encodings. So, while LLVM should not *emit* the new mnemonics when
BTI is disabled, this patch will at least make LLVM *accept*
assembly code that uses them.
Reviewers: pbarrio, tamas.petz, ostannard
Reviewed By: pbarrio, ostannard
Subscribers: ostannard, kristof.beyls, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D81257
Diffstat (limited to 'llvm/lib/CodeGen/MachineScheduler.cpp')
0 files changed, 0 insertions, 0 deletions