diff options
| author | paperchalice <liujunchang97@outlook.com> | 2024-07-09 09:11:18 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-07-09 09:11:18 +0800 |
| commit | 79d0de2ac37b6b7d66720611935d1dd7fc4fbd43 (patch) | |
| tree | 27fc88539708d84f03ca11a890551780e33a5f2c /llvm/lib/CodeGen/MachineScheduler.cpp | |
| parent | afa6bed8afe9011c07c682a0a24362260d92cfdd (diff) | |
| download | llvm-79d0de2ac37b6b7d66720611935d1dd7fc4fbd43.zip llvm-79d0de2ac37b6b7d66720611935d1dd7fc4fbd43.tar.gz llvm-79d0de2ac37b6b7d66720611935d1dd7fc4fbd43.tar.bz2 | |
[CodeGen][NewPM] Port `machine-loops` to new pass manager (#97793)
- Add `MachineLoopAnalysis`.
- Add `MachineLoopPrinterPass`.
- Convert to `MachineLoopInfoWrapperPass` in legacy pass manager.
Diffstat (limited to 'llvm/lib/CodeGen/MachineScheduler.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/MachineScheduler.cpp | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/llvm/lib/CodeGen/MachineScheduler.cpp b/llvm/lib/CodeGen/MachineScheduler.cpp index 4a6d5ed..84ba703 100644 --- a/llvm/lib/CodeGen/MachineScheduler.cpp +++ b/llvm/lib/CodeGen/MachineScheduler.cpp @@ -267,7 +267,7 @@ INITIALIZE_PASS_BEGIN(MachineScheduler, DEBUG_TYPE, "Machine Instruction Scheduler", false, false) INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass) INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass) -INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo) +INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass) INITIALIZE_PASS_DEPENDENCY(SlotIndexes) INITIALIZE_PASS_DEPENDENCY(LiveIntervals) INITIALIZE_PASS_END(MachineScheduler, DEBUG_TYPE, @@ -280,7 +280,7 @@ MachineScheduler::MachineScheduler() : MachineSchedulerBase(ID) { void MachineScheduler::getAnalysisUsage(AnalysisUsage &AU) const { AU.setPreservesCFG(); AU.addRequired<MachineDominatorTreeWrapperPass>(); - AU.addRequired<MachineLoopInfo>(); + AU.addRequired<MachineLoopInfoWrapperPass>(); AU.addRequired<AAResultsWrapperPass>(); AU.addRequired<TargetPassConfig>(); AU.addRequired<SlotIndexes>(); @@ -297,7 +297,7 @@ char &llvm::PostMachineSchedulerID = PostMachineScheduler::ID; INITIALIZE_PASS_BEGIN(PostMachineScheduler, "postmisched", "PostRA Machine Instruction Scheduler", false, false) INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass) -INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo) +INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass) INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass) INITIALIZE_PASS_END(PostMachineScheduler, "postmisched", "PostRA Machine Instruction Scheduler", false, false) @@ -309,7 +309,7 @@ PostMachineScheduler::PostMachineScheduler() : MachineSchedulerBase(ID) { void PostMachineScheduler::getAnalysisUsage(AnalysisUsage &AU) const { AU.setPreservesCFG(); AU.addRequired<MachineDominatorTreeWrapperPass>(); - AU.addRequired<MachineLoopInfo>(); + AU.addRequired<MachineLoopInfoWrapperPass>(); AU.addRequired<AAResultsWrapperPass>(); AU.addRequired<TargetPassConfig>(); MachineFunctionPass::getAnalysisUsage(AU); @@ -444,7 +444,7 @@ bool MachineScheduler::runOnMachineFunction(MachineFunction &mf) { // Initialize the context of the pass. MF = &mf; - MLI = &getAnalysis<MachineLoopInfo>(); + MLI = &getAnalysis<MachineLoopInfoWrapperPass>().getLI(); MDT = &getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree(); PassConfig = &getAnalysis<TargetPassConfig>(); AA = &getAnalysis<AAResultsWrapperPass>().getAAResults(); @@ -491,7 +491,7 @@ bool PostMachineScheduler::runOnMachineFunction(MachineFunction &mf) { // Initialize the context of the pass. MF = &mf; - MLI = &getAnalysis<MachineLoopInfo>(); + MLI = &getAnalysis<MachineLoopInfoWrapperPass>().getLI(); PassConfig = &getAnalysis<TargetPassConfig>(); AA = &getAnalysis<AAResultsWrapperPass>().getAAResults(); |