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author | David Penry <david.penry@arm.com> | 2021-04-19 21:23:05 +0100 |
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committer | David Green <david.green@arm.com> | 2021-04-19 21:23:05 +0100 |
commit | 78a871abf7018f4a288b773c9c89f99cd5c66b9c (patch) | |
tree | 7f65888f3db81d6c5aa0d32cf46c5fc8d495c7f8 /llvm/lib/CodeGen/MachineScheduler.cpp | |
parent | 3c54762226ed9bcb84dfdef9f8e6e6a2c6a971a0 (diff) | |
download | llvm-78a871abf7018f4a288b773c9c89f99cd5c66b9c.zip llvm-78a871abf7018f4a288b773c9c89f99cd5c66b9c.tar.gz llvm-78a871abf7018f4a288b773c9c89f99cd5c66b9c.tar.bz2 |
[ARM] Use ProcResGroup in Cortex-M7 scheduling model
Used to model structural hazards on FP issue, where some
instructions take up 2 issue slots and others one as well
as similar structural hazards on load issue, where some
instructions take up two load lanes and others one.
Differential Revision: https://reviews.llvm.org/D98977
Diffstat (limited to 'llvm/lib/CodeGen/MachineScheduler.cpp')
0 files changed, 0 insertions, 0 deletions