diff options
| author | Luke Lau <luke@igalia.com> | 2025-02-05 13:01:01 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-02-05 13:01:01 +0800 |
| commit | 51b0517a5e44ab3864551035f0df52ab33e2f74c (patch) | |
| tree | ac5aafacf003fd30e2a72b57dce6c3ced532dbb4 /llvm/lib/CodeGen/MachineScheduler.cpp | |
| parent | 3ac1cb6d3028b9f95a61c2612a13306532ddca14 (diff) | |
| download | llvm-51b0517a5e44ab3864551035f0df52ab33e2f74c.zip llvm-51b0517a5e44ab3864551035f0df52ab33e2f74c.tar.gz llvm-51b0517a5e44ab3864551035f0df52ab33e2f74c.tar.bz2 | |
[RISCV] Don't check extop VL in vfwred{u,o}sum patterns (#125799)
Because riscv_fpextend_vl doesn't have a passthru operand the tail
elements are undef, so we can treat them as if they were active.
Relaxing this allows us to match widening reductions where the fpextend
isn't a VP intrinsic.
This same reasoning is already used for riscv_fpextend_vl in
RISCVInstrInfoVSDPatterns.td
Diffstat (limited to 'llvm/lib/CodeGen/MachineScheduler.cpp')
0 files changed, 0 insertions, 0 deletions