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| author | Sanjay Patel <spatel@rotateright.com> | 2020-11-17 13:24:47 -0500 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2020-11-17 13:36:08 -0500 |
| commit | 4a66a1d17abfb7cf34081f0620cb2f53b40cca97 (patch) | |
| tree | 237f263e8740528403f687720828324cccc2adba /llvm/lib/CodeGen/MachineScheduler.cpp | |
| parent | 49e0de5f6fe6470523576fb01d38021ea2957260 (diff) | |
| download | llvm-4a66a1d17abfb7cf34081f0620cb2f53b40cca97.zip llvm-4a66a1d17abfb7cf34081f0620cb2f53b40cca97.tar.gz llvm-4a66a1d17abfb7cf34081f0620cb2f53b40cca97.tar.bz2 | |
[InstCombine] allow vectors for masked-add -> xor fold
https://rise4fun.com/Alive/I4Ge
Name: add with pow2 mask
Pre: isPowerOf2(C2) && (C1 & C2) != 0 && (C1 & (C2-1)) == 0
%a = add i8 %x, C1
%r = and i8 %a, C2
=>
%n = and i8 %x, C2
%r = xor i8 %n, C2
Diffstat (limited to 'llvm/lib/CodeGen/MachineScheduler.cpp')
0 files changed, 0 insertions, 0 deletions