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author | Hal Finkel <hfinkel@anl.gov> | 2014-03-01 21:36:57 +0000 |
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committer | Hal Finkel <hfinkel@anl.gov> | 2014-03-01 21:36:57 +0000 |
commit | 46043edc565288dc3dff7eba97d09922bc530549 (patch) | |
tree | a4f39e94eb424630526a094428aca2b96f15beeb /llvm/lib/CodeGen/MachineScheduler.cpp | |
parent | 228687411979c3047fb58fd5f4ed999abddd4cb4 (diff) | |
download | llvm-46043edc565288dc3dff7eba97d09922bc530549.zip llvm-46043edc565288dc3dff7eba97d09922bc530549.tar.gz llvm-46043edc565288dc3dff7eba97d09922bc530549.tar.bz2 |
Remove extra truncs/exts around i32 bit operations on PPC64
This generalizes the code to eliminate extra truncs/exts around i1 bit
operations to also do the same on PPC64 for i32 bit operations. This eliminates
a fairly prevalent code wart:
int foo(int a) {
return a == 5 ? 7 : 8;
}
On PPC64, because of the extension implied by the ABI, this would generate:
cmplwi 0, 3, 5
li 12, 8
li 4, 7
isel 3, 4, 12, 2
rldicl 3, 3, 0, 32
blr
where the 'rldicl 3, 3, 0, 32', the extension, is completely unnecessary. At
least for the single-BB case (which is all that the DAG combine mechanism can
handle), this unnecessary extension is no longer generated.
llvm-svn: 202600
Diffstat (limited to 'llvm/lib/CodeGen/MachineScheduler.cpp')
0 files changed, 0 insertions, 0 deletions