diff options
| author | Hao Liu <Hao.Liu@arm.com> | 2014-10-14 06:50:36 +0000 |
|---|---|---|
| committer | Hao Liu <Hao.Liu@arm.com> | 2014-10-14 06:50:36 +0000 |
| commit | 3cb826ca10e090a636173cda14454419ceb95db8 (patch) | |
| tree | 53116074b502ec96d8d3352085b87abba371cc8c /llvm/lib/CodeGen/MachineScheduler.cpp | |
| parent | f88472379995179eec3bc64cdbfff85e5199e01d (diff) | |
| download | llvm-3cb826ca10e090a636173cda14454419ceb95db8.zip llvm-3cb826ca10e090a636173cda14454419ceb95db8.tar.gz llvm-3cb826ca10e090a636173cda14454419ceb95db8.tar.bz2 | |
[AArch64]Select wide immediate offset into [Base+XReg] addressing mode
e.g Currently we'll generate following instructions if the immediate is too wide:
MOV X0, WideImmediate
ADD X1, BaseReg, X0
LDR X2, [X1, 0]
Using [Base+XReg] addressing mode can save one ADD as following:
MOV X0, WideImmediate
LDR X2, [BaseReg, X0]
Differential Revision: http://reviews.llvm.org/D5477
llvm-svn: 219665
Diffstat (limited to 'llvm/lib/CodeGen/MachineScheduler.cpp')
0 files changed, 0 insertions, 0 deletions