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author | David Green <david.green@arm.com> | 2020-06-09 17:35:45 +0100 |
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committer | David Green <david.green@arm.com> | 2020-06-09 19:13:53 +0100 |
commit | 2fea3fe41c5a177d019dd99fb1b43d767eccde24 (patch) | |
tree | 14f50008cd93f22cdc4e2ca5cd631526a02d9aef /llvm/lib/CodeGen/MachineScheduler.cpp | |
parent | 6bb93e3dd0e28dafe6d3ddb700d2036d00b323aa (diff) | |
download | llvm-2fea3fe41c5a177d019dd99fb1b43d767eccde24.zip llvm-2fea3fe41c5a177d019dd99fb1b43d767eccde24.tar.gz llvm-2fea3fe41c5a177d019dd99fb1b43d767eccde24.tar.bz2 |
[MachineScheduler] Update available queue on the first mop of a new cycle
If a resource can be held for multiple cycles in the schedule model
then an instruction can be placed into the available queue, another
instruction can be scheduled, but the first will not be taken back out if
the two instructions hazard. To fix this make sure that we update the
available queue even on the first MOp of a cycle, pushing available
instructions back into the pending queue if they now conflict.
This happens with some downstream schedules we have around MVE
instruction scheduling where we use ResourceCycles=[2] to show the
instruction executing over two beats. Apparently the test changes here
are OK too.
Differential Revision: https://reviews.llvm.org/D76909
Diffstat (limited to 'llvm/lib/CodeGen/MachineScheduler.cpp')
-rw-r--r-- | llvm/lib/CodeGen/MachineScheduler.cpp | 16 |
1 files changed, 7 insertions, 9 deletions
diff --git a/llvm/lib/CodeGen/MachineScheduler.cpp b/llvm/lib/CodeGen/MachineScheduler.cpp index a688991..0f21c97 100644 --- a/llvm/lib/CodeGen/MachineScheduler.cpp +++ b/llvm/lib/CodeGen/MachineScheduler.cpp @@ -2424,16 +2424,14 @@ SUnit *SchedBoundary::pickOnlyChoice() { if (CheckPending) releasePending(); - if (CurrMOps > 0) { - // Defer any ready instrs that now have a hazard. - for (ReadyQueue::iterator I = Available.begin(); I != Available.end();) { - if (checkHazard(*I)) { - Pending.push(*I); - I = Available.remove(I); - continue; - } - ++I; + // Defer any ready instrs that now have a hazard. + for (ReadyQueue::iterator I = Available.begin(); I != Available.end();) { + if (checkHazard(*I)) { + Pending.push(*I); + I = Available.remove(I); + continue; } + ++I; } for (unsigned i = 0; Available.empty(); ++i) { // FIXME: Re-enable assert once PR20057 is resolved. |