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| author | Andrew Trick <atrick@apple.com> | 2012-06-29 03:23:18 +0000 |
|---|---|---|
| committer | Andrew Trick <atrick@apple.com> | 2012-06-29 03:23:18 +0000 |
| commit | 1f50152b2d74b2dd7d5fd181abeb7208c82b39f0 (patch) | |
| tree | f7e32c7c042cd06ac7f8dcc464f235a1444d72df /llvm/lib/CodeGen/MachineScheduler.cpp | |
| parent | 099ec015692a4bc9860b2a513742b3b9fa9e76b6 (diff) | |
| download | llvm-1f50152b2d74b2dd7d5fd181abeb7208c82b39f0.zip llvm-1f50152b2d74b2dd7d5fd181abeb7208c82b39f0.tar.gz llvm-1f50152b2d74b2dd7d5fd181abeb7208c82b39f0.tar.bz2 | |
Make NumMicroOps a variable in the subtarget's instruction itinerary.
The TargetInstrInfo::getNumMicroOps API does not change, but soon it
will be used by MachineScheduler. Now each subtarget can specify the
number of micro-ops per itinerary class. For ARM, this is currently
always dynamic (-1), because it is used for load/store multiple which
depends on the number of register operands.
Zero is now a valid number of micro-ops. This can be used for
nop pseudo-instructions or instructions that the hardware can squash
during dispatch.
llvm-svn: 159406
Diffstat (limited to 'llvm/lib/CodeGen/MachineScheduler.cpp')
0 files changed, 0 insertions, 0 deletions