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author | Cullen Rhodes <cullen.rhodes@arm.com> | 2025-02-05 09:14:51 +0000 |
---|---|---|
committer | GitHub <noreply@github.com> | 2025-02-05 09:14:51 +0000 |
commit | 1cf909208e509aedbd63edb5af0b96f85d5ae28b (patch) | |
tree | 559d56ce7da0554f9cb2a2e4d7a7869619c5c425 /llvm/lib/CodeGen/MachineScheduler.cpp | |
parent | ad152f4bcfe465b57562fa003b93f44e1a3b2287 (diff) | |
download | llvm-1cf909208e509aedbd63edb5af0b96f85d5ae28b.zip llvm-1cf909208e509aedbd63edb5af0b96f85d5ae28b.tar.gz llvm-1cf909208e509aedbd63edb5af0b96f85d5ae28b.tar.bz2 |
[MISched] Small debug improvements (#125072)
Changes:
1. Fix inconsistencies in register pressure set printing. "Max Pressure"
printing is inconsistent with "Bottom Pressure" and "Top Pressure".
For the former, register class begins on the same line vs newline for
latter. Also for the former, the first register class is on the same
line, but subsequent register classes are newline separated. That's
removed so all are on the same line.
Before:
Max Pressure: FPR8=1
GPR32=14
Top Pressure:
GPR32=2
Bottom Pressure:
FPR8=7
GPR32=17
After:
Max Pressure: FPR8=1 GPR32=14
Top Pressure: GPR32=2
Bottom Pressure: FPR8=7 GPR32=17
2. After scheduling an instruction, don't print pressure diff if there
isn't one. Also s/UpdateRegP/UpdateRegPressure. E.g.,
Before:
UpdateRegP: SU(3) %0:gpr64common = ADDXrr %58:gpr64common, gpr64
to
UpdateRegP: SU(4) %393:gpr64sp = ADDXri %58:gpr64common, 390, 12
to GPR32 -1
After:
UpdateRegPressure: SU(4) %393:gpr64sp = ADDXri %58:gpr64common, 12
to GPR32 -1
3. Don't print excess pressure sets if there are none.
Diffstat (limited to 'llvm/lib/CodeGen/MachineScheduler.cpp')
-rw-r--r-- | llvm/lib/CodeGen/MachineScheduler.cpp | 43 |
1 files changed, 27 insertions, 16 deletions
diff --git a/llvm/lib/CodeGen/MachineScheduler.cpp b/llvm/lib/CodeGen/MachineScheduler.cpp index de77145..df90077 100644 --- a/llvm/lib/CodeGen/MachineScheduler.cpp +++ b/llvm/lib/CodeGen/MachineScheduler.cpp @@ -1414,9 +1414,9 @@ void ScheduleDAGMILive::initRegPressure() { updatePressureDiffs(LiveUses); } - LLVM_DEBUG(dbgs() << "Top Pressure:\n"; + LLVM_DEBUG(dbgs() << "Top Pressure: "; dumpRegSetPressure(TopRPTracker.getRegSetPressureAtPos(), TRI); - dbgs() << "Bottom Pressure:\n"; + dbgs() << "Bottom Pressure: "; dumpRegSetPressure(BotRPTracker.getRegSetPressureAtPos(), TRI);); assert((BotRPTracker.getPos() == RegionEnd || @@ -1437,11 +1437,14 @@ void ScheduleDAGMILive::initRegPressure() { RegionCriticalPSets.push_back(PressureChange(i)); } } - LLVM_DEBUG(dbgs() << "Excess PSets: "; - for (const PressureChange &RCPS - : RegionCriticalPSets) dbgs() - << TRI->getRegPressureSetName(RCPS.getPSet()) << " "; - dbgs() << "\n"); + LLVM_DEBUG({ + if (RegionCriticalPSets.size() > 0) { + dbgs() << "Excess PSets: "; + for (const PressureChange &RCPS : RegionCriticalPSets) + dbgs() << TRI->getRegPressureSetName(RCPS.getPSet()) << " "; + dbgs() << "\n"; + } + }); } void ScheduleDAGMILive:: @@ -1495,10 +1498,14 @@ void ScheduleDAGMILive::updatePressureDiffs(ArrayRef<VRegMaskOrUnit> LiveUses) { PressureDiff &PDiff = getPressureDiff(&SU); PDiff.addPressureChange(Reg, Decrement, &MRI); - LLVM_DEBUG(dbgs() << " UpdateRegP: SU(" << SU.NodeNum << ") " - << printReg(Reg, TRI) << ':' - << PrintLaneMask(P.LaneMask) << ' ' << *SU.getInstr(); - dbgs() << " to "; PDiff.dump(*TRI);); + if (llvm::any_of(PDiff, [](const PressureChange &Change) { + return Change.isValid(); + })) + LLVM_DEBUG(dbgs() + << " UpdateRegPressure: SU(" << SU.NodeNum << ") " + << printReg(Reg, TRI) << ':' + << PrintLaneMask(P.LaneMask) << ' ' << *SU.getInstr(); + dbgs() << " to "; PDiff.dump(*TRI);); } } else { assert(P.LaneMask.any()); @@ -1530,9 +1537,13 @@ void ScheduleDAGMILive::updatePressureDiffs(ArrayRef<VRegMaskOrUnit> LiveUses) { if (LRQ.valueIn() == VNI) { PressureDiff &PDiff = getPressureDiff(SU); PDiff.addPressureChange(Reg, true, &MRI); - LLVM_DEBUG(dbgs() << " UpdateRegP: SU(" << SU->NodeNum << ") " - << *SU->getInstr(); - dbgs() << " to "; PDiff.dump(*TRI);); + if (llvm::any_of(PDiff, [](const PressureChange &Change) { + return Change.isValid(); + })) + LLVM_DEBUG(dbgs() << " UpdateRegPressure: SU(" << SU->NodeNum + << ") " << *SU->getInstr(); + dbgs() << " to "; + PDiff.dump(*TRI);); } } } @@ -1792,7 +1803,7 @@ void ScheduleDAGMILive::scheduleMI(SUnit *SU, bool IsTopNode) { TopRPTracker.advance(RegOpers); assert(TopRPTracker.getPos() == CurrentTop && "out of sync"); - LLVM_DEBUG(dbgs() << "Top Pressure:\n"; dumpRegSetPressure( + LLVM_DEBUG(dbgs() << "Top Pressure: "; dumpRegSetPressure( TopRPTracker.getRegSetPressureAtPos(), TRI);); updateScheduledPressure(SU, TopRPTracker.getPressure().MaxSetPressure); @@ -1830,7 +1841,7 @@ void ScheduleDAGMILive::scheduleMI(SUnit *SU, bool IsTopNode) { SmallVector<VRegMaskOrUnit, 8> LiveUses; BotRPTracker.recede(RegOpers, &LiveUses); assert(BotRPTracker.getPos() == CurrentBottom && "out of sync"); - LLVM_DEBUG(dbgs() << "Bottom Pressure:\n"; dumpRegSetPressure( + LLVM_DEBUG(dbgs() << "Bottom Pressure: "; dumpRegSetPressure( BotRPTracker.getRegSetPressureAtPos(), TRI);); updateScheduledPressure(SU, BotRPTracker.getPressure().MaxSetPressure); |