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| author | Elad Cohen <elad2.cohen@intel.com> | 2017-08-17 08:06:36 +0000 |
|---|---|---|
| committer | Elad Cohen <elad2.cohen@intel.com> | 2017-08-17 08:06:36 +0000 |
| commit | 124d32829c1e85a156343ab416271d06d06ef958 (patch) | |
| tree | 434dd6bda31ade5007e3e0a6d97d4c563c3e9c30 /llvm/lib/CodeGen/MachineScheduler.cpp | |
| parent | a7e061f07b258bc0fb25d373c21dc8c8d0b478a5 (diff) | |
| download | llvm-124d32829c1e85a156343ab416271d06d06ef958.zip llvm-124d32829c1e85a156343ab416271d06d06ef958.tar.gz llvm-124d32829c1e85a156343ab416271d06d06ef958.tar.bz2 | |
[SelectionDAG] Teach the vector-types operand scalarizer about SETCC
When v1i1 is legal (e.g. AVX512) the legalizer can reach
a case where a v1i1 SETCC with an illgeal vector type operand
wasn't scalarized (since v1i1 is legal) but its operands does
have to be scalarized. This used to assert because SETCC was
missing from the vector operand scalarizer.
This patch attemps to teach the legalizer to handle these cases
by scalazring the operands, converting the node into a scalar
SETCC node.
Differential revision: https://reviews.llvm.org/D36651
llvm-svn: 311071
Diffstat (limited to 'llvm/lib/CodeGen/MachineScheduler.cpp')
0 files changed, 0 insertions, 0 deletions