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| author | Ivan Kosarev <ivan.kosarev@amd.com> | 2025-05-08 11:43:50 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-05-08 11:43:50 +0100 |
| commit | d9bdc2d6a2d3efcce81ecab151b393f19a81696b (patch) | |
| tree | 82721b32dcaba0468bdaf6a3357e9037a855f17d /llvm/lib/CodeGen/MachineRegisterInfo.cpp | |
| parent | 92cc31b0f7737408dffd38c2384dff825abb8e3a (diff) | |
| download | llvm-d9bdc2d6a2d3efcce81ecab151b393f19a81696b.zip llvm-d9bdc2d6a2d3efcce81ecab151b393f19a81696b.tar.gz llvm-d9bdc2d6a2d3efcce81ecab151b393f19a81696b.tar.bz2 | |
[AMDGPU][Disassembler][NFCI] Always defer immediate operands. (#138885)
Removes the need to parameterise decoders with OperandSemantics,
ImmWidth and MandatoryLiteral.
Likely allows further simplification of handling _DEFERRED immediates.
Tested to work downstream.
Diffstat (limited to 'llvm/lib/CodeGen/MachineRegisterInfo.cpp')
0 files changed, 0 insertions, 0 deletions