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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-12-19 12:02:40 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-12-19 12:02:40 +0000 |
| commit | f6d4ab6daf67d48b626e08b8906e0cf9b3d48275 (patch) | |
| tree | 06235331d59d11630018ca719602ce1f95c88054 /llvm/lib/CodeGen/MachineOperand.cpp | |
| parent | 2130e6a080a1a5d4da6c34c6a5056ef095cb4b21 (diff) | |
| download | llvm-f6d4ab6daf67d48b626e08b8906e0cf9b3d48275.zip llvm-f6d4ab6daf67d48b626e08b8906e0cf9b3d48275.tar.gz llvm-f6d4ab6daf67d48b626e08b8906e0cf9b3d48275.tar.bz2 | |
[X86][SSE] Use (V)PHMINPOSUW for vXi8 SMAX/SMIN/UMAX/UMIN horizontal reductions (PR32841)
Extension to D39729 which performed this for vXi16, with the same bit flipping to handle SMAX/SMIN/UMAX cases, vXi8 UMIN horizontal reductions can be performed.
This makes use of the fact that by performing a pair-wise i8 SHUFFLE/UMIN before PHMINPOSUW, we both get the UMIN of each pair but also zero-extend the upper bits ready for v8i16.
Differential Revision: https://reviews.llvm.org/D41294
llvm-svn: 321070
Diffstat (limited to 'llvm/lib/CodeGen/MachineOperand.cpp')
0 files changed, 0 insertions, 0 deletions