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| author | Durgadoss R <durgadossr@nvidia.com> | 2024-10-27 22:24:31 +0530 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-10-27 22:24:31 +0530 |
| commit | e33aec89ef1378d80e8df2e965ac5e6e6aa2e3de (patch) | |
| tree | 4aaed2282eac980fc2579638790567657fc6f331 /llvm/lib/CodeGen/MachineOperand.cpp | |
| parent | 7fe149cdf09d04fb8390b97c91bd9214c968cd3e (diff) | |
| download | llvm-e33aec89ef1378d80e8df2e965ac5e6e6aa2e3de.zip llvm-e33aec89ef1378d80e8df2e965ac5e6e6aa2e3de.tar.gz llvm-e33aec89ef1378d80e8df2e965ac5e6e6aa2e3de.tar.bz2 | |
[MLIR][NVVM] Update the elect.sync Op to use intrinsics (#113757)
Recently, we added an intrinsic for the elect.sync PTX instruction (PR
104780). This patch updates the corresponding Op in NVVM Dialect
to lower to the intrinsic instead of inline-ptx.
The existing test under Conversion/ is migrated to check for the new
pattern. A separate test is added to verify the lowered intrinsic under
the Target/ directory.
Signed-off-by: Durgadoss R <durgadossr@nvidia.com>
Diffstat (limited to 'llvm/lib/CodeGen/MachineOperand.cpp')
0 files changed, 0 insertions, 0 deletions