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| author | Craig Topper <craig.topper@intel.com> | 2017-12-19 06:29:00 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2017-12-19 06:29:00 +0000 |
| commit | 6e3091c265c276a876fd1061aaa05d56e358caec (patch) | |
| tree | a1267ef9ff0d1b48ac83413d6ab0b448e74f59c1 /llvm/lib/CodeGen/MachineOperand.cpp | |
| parent | eb13a418e1786b633cb5ad05dea4376f77bd70e0 (diff) | |
| download | llvm-6e3091c265c276a876fd1061aaa05d56e358caec.zip llvm-6e3091c265c276a876fd1061aaa05d56e358caec.tar.gz llvm-6e3091c265c276a876fd1061aaa05d56e358caec.tar.bz2 | |
[X86] Use a specific list of MVTs in combineShiftRightArithmetic instead of iterating over every integer VT and checking their size.
Previously, we were checking for MVTs with sizes betwen 8 and 64 which only includes i8, i16, i32, and i64 today. But I don't think we should assume that and should list the types that are legal for x86. I also don't think we need i64 since type legalization is guaranteed to split those up.
llvm-svn: 321058
Diffstat (limited to 'llvm/lib/CodeGen/MachineOperand.cpp')
0 files changed, 0 insertions, 0 deletions