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| author | Alex Bradbury <asb@lowrisc.org> | 2017-12-15 09:47:01 +0000 |
|---|---|---|
| committer | Alex Bradbury <asb@lowrisc.org> | 2017-12-15 09:47:01 +0000 |
| commit | 59136ffab1b0b051d2b56a90b8fb86d5721ed0b5 (patch) | |
| tree | 24622ca1fac71461163cdad8ee91cf5f9ab32caf /llvm/lib/CodeGen/MachineOperand.cpp | |
| parent | 4b86d7904863b3d0e552db37f455fe76430e6d46 (diff) | |
| download | llvm-59136ffab1b0b051d2b56a90b8fb86d5721ed0b5.zip llvm-59136ffab1b0b051d2b56a90b8fb86d5721ed0b5.tar.gz llvm-59136ffab1b0b051d2b56a90b8fb86d5721ed0b5.tar.bz2 | |
[RISCV] Enable emission of alias instructions by default
This patch switches the default for -riscv-no-aliases to false
and updates all affected MC and CodeGen tests. As recommended in
D41071, MC tests use the canonical instructions and the CodeGen
tests use the aliases.
Additionally, for the f and d instructions with rounding mode,
the tests for the aliased versions are moved and tightened such
that they can actually detect if alias emission is enabled.
(see D40902 for context)
Differential Revision: https://reviews.llvm.org/D41225
Patch by Mario Werner.
llvm-svn: 320797
Diffstat (limited to 'llvm/lib/CodeGen/MachineOperand.cpp')
0 files changed, 0 insertions, 0 deletions