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| author | Phoebe Wang <phoebe.wang@intel.com> | 2024-10-28 09:54:29 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-10-28 09:54:29 +0800 |
| commit | 40fffba9b29141d598bf36cdc4bb886e97143d06 (patch) | |
| tree | 3a03d2404ce48e581ec7adca84cef0fa9bb011d4 /llvm/lib/CodeGen/MachineOperand.cpp | |
| parent | 1fe8e7838bb5118b9e48fa15fa21a4638bae8ae1 (diff) | |
| download | llvm-40fffba9b29141d598bf36cdc4bb886e97143d06.zip llvm-40fffba9b29141d598bf36cdc4bb886e97143d06.tar.gz llvm-40fffba9b29141d598bf36cdc4bb886e97143d06.tar.bz2 | |
[X86][AVX10.2] Fix wrong predicates for BF16 feature (#113800)
Since AVX10.2, we need to enable 128/256-bit vector by default and check
for 512 feature for 512-bit vector.
Diffstat (limited to 'llvm/lib/CodeGen/MachineOperand.cpp')
0 files changed, 0 insertions, 0 deletions