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| author | Simon Dardis <simon.dardis@mips.com> | 2017-12-19 11:16:22 +0000 |
|---|---|---|
| committer | Simon Dardis <simon.dardis@mips.com> | 2017-12-19 11:16:22 +0000 |
| commit | 1ade566c451c1aa7f0dc70d2a4e37874d5105c2c (patch) | |
| tree | 883fa7e6ee50fd37e6ca0cdd688641f3ecb07c3b /llvm/lib/CodeGen/MachineOperand.cpp | |
| parent | 800d4371f31a80fd7cba643257191955c68e2444 (diff) | |
| download | llvm-1ade566c451c1aa7f0dc70d2a4e37874d5105c2c.zip llvm-1ade566c451c1aa7f0dc70d2a4e37874d5105c2c.tar.gz llvm-1ade566c451c1aa7f0dc70d2a4e37874d5105c2c.tar.bz2 | |
[mips] Handle the emission of microMIPSr6 sll instruction when used as a nop.
This instruction is encoded as zero, so we have handle that case when checking
for unimplemented opcodes when producing the encoding for an instruction.
llvm-svn: 321066
Diffstat (limited to 'llvm/lib/CodeGen/MachineOperand.cpp')
0 files changed, 0 insertions, 0 deletions