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| author | Paul Walker <paul.walker@arm.com> | 2022-05-14 12:49:07 +0100 |
|---|---|---|
| committer | Paul Walker <paul.walker@arm.com> | 2022-05-16 22:34:12 +0100 |
| commit | ee8aa351e43f27e1dd4240560a3e054ca045186f (patch) | |
| tree | 53d3ee8b7ef0e5fbfe207a8282e4e5465fe83c88 /llvm/lib/CodeGen/MachineModuleInfoImpls.cpp | |
| parent | 9a90ea1fdcd29f7245ec0bc1295ce96fc0ec2365 (diff) | |
| download | llvm-ee8aa351e43f27e1dd4240560a3e054ca045186f.zip llvm-ee8aa351e43f27e1dd4240560a3e054ca045186f.tar.gz llvm-ee8aa351e43f27e1dd4240560a3e054ca045186f.tar.bz2 | |
[AArch64] Use ADDV for boolean xor reductions.
NEON does not have native support for xor reductions. However, when
reducing predicate vectors the operation is synonymous with an add
reduction that is supported.
Differential Revision: https://reviews.llvm.org/D125605
Diffstat (limited to 'llvm/lib/CodeGen/MachineModuleInfoImpls.cpp')
0 files changed, 0 insertions, 0 deletions