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| author | Sanjay Patel <spatel@rotateright.com> | 2021-07-09 15:08:03 -0400 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2021-07-09 15:32:12 -0400 |
| commit | 55c5c0485924895800c683386a4560bdc253623e (patch) | |
| tree | 05537bed4145c3e984aaea62c8569121b5ec3e80 /llvm/lib/CodeGen/MachineModuleInfoImpls.cpp | |
| parent | 86e65234404fa329cd65b5522aae8e82f4fa152b (diff) | |
| download | llvm-55c5c0485924895800c683386a4560bdc253623e.zip llvm-55c5c0485924895800c683386a4560bdc253623e.tar.gz llvm-55c5c0485924895800c683386a4560bdc253623e.tar.bz2 | |
[PhaseOrdering] add tests for vector cmp reductions; NFC
These are based on PR41312. There needs to be effort
from all of SimplifyCFG, InstCombine, SLP, and possibly
VectorCombine to get this into ideal form.
Diffstat (limited to 'llvm/lib/CodeGen/MachineModuleInfoImpls.cpp')
0 files changed, 0 insertions, 0 deletions