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| author | Yingwei Zheng <dtcxzyw2333@gmail.com> | 2024-04-23 19:35:15 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-04-23 19:35:15 +0800 |
| commit | 9fb7a736f0f893ffd5da3cebaed30bc91e6a8514 (patch) | |
| tree | 91c35f87212b22070ea8bb2ef8e5b0ecce2aa950 /llvm/lib/CodeGen/MachineModuleInfo.cpp | |
| parent | b8174512111bc116776de24e2cff3f6f94d536fe (diff) | |
| download | llvm-9fb7a736f0f893ffd5da3cebaed30bc91e6a8514.zip llvm-9fb7a736f0f893ffd5da3cebaed30bc91e6a8514.tar.gz llvm-9fb7a736f0f893ffd5da3cebaed30bc91e6a8514.tar.bz2 | |
[InstCombine] Fold fcmp into select (#86482)
This patch simplifies `fcmp (select Cond, C1, C2), C3` patterns in
ceres:
Alive2: https://alive2.llvm.org/ce/z/fWh_sD
```
define i1 @src(double %x) {
%cmp1 = fcmp ord double %x, 0.000000e+00
%sel = select i1 %cmp1, double 0xFFFFFFFFFFFFFFFF, double 0.000000e+00
%cmp2 = fcmp oeq double %sel, 0.000000e+00
ret i1 %cmp2
}
define i1 @tgt(double %x) {
%cmp1 = fcmp uno double %x, 0.000000e+00
ret i1 %cmp1
}
```
Diffstat (limited to 'llvm/lib/CodeGen/MachineModuleInfo.cpp')
0 files changed, 0 insertions, 0 deletions