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| author | Matthias Braun <matze@braunis.de> | 2015-04-21 17:21:36 +0000 |
|---|---|---|
| committer | Matthias Braun <matze@braunis.de> | 2015-04-21 17:21:36 +0000 |
| commit | 9e9e8b323088eba0f32044b09236e172bd203592 (patch) | |
| tree | 4196d5f30073dd44e62214baeca9c885231df0f6 /llvm/lib/CodeGen/MachineModuleInfo.cpp | |
| parent | acd58af7df327e6c1139badc59d0641c7dce2d50 (diff) | |
| download | llvm-9e9e8b323088eba0f32044b09236e172bd203592.zip llvm-9e9e8b323088eba0f32044b09236e172bd203592.tar.gz llvm-9e9e8b323088eba0f32044b09236e172bd203592.tar.bz2 | |
X86: Match for X86ISD nodes in LowerBUILD_VECTOR instead of BUILD_VECTORCombine
There doesn't seem to be a reason to perform this target ISD node matching
in an DAGCombine, moving it to lowering fixes PR23296.
Differential Revision: http://reviews.llvm.org/D9137
llvm-svn: 235394
Diffstat (limited to 'llvm/lib/CodeGen/MachineModuleInfo.cpp')
0 files changed, 0 insertions, 0 deletions