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| author | Lei Huang <lei@ca.ibm.com> | 2022-12-20 10:11:55 -0600 |
|---|---|---|
| committer | Lei Huang <lei@ca.ibm.com> | 2022-12-21 09:15:57 -0600 |
| commit | 7a7e9109a2d64a1c09b5dbe958893329fc30467e (patch) | |
| tree | b9853ba0590bdb017fb92ddef8232e2c73b38c1e /llvm/lib/CodeGen/MachineModuleInfo.cpp | |
| parent | 3e65ad7482e9e612abcc115f8fb2ed379fcad612 (diff) | |
| download | llvm-7a7e9109a2d64a1c09b5dbe958893329fc30467e.zip llvm-7a7e9109a2d64a1c09b5dbe958893329fc30467e.tar.gz llvm-7a7e9109a2d64a1c09b5dbe958893329fc30467e.tar.bz2 | |
[PowerPC] Implement P10 Byte Reverse Insructions
Generate brh, brw and brd instructions for byte-swap operations
on P10 and generating a single instruction for a 32-bit swap followed
by a 16-bit right shift.
Reviewed By: stefanp
Differential Revision: https://reviews.llvm.org/D140414
Diffstat (limited to 'llvm/lib/CodeGen/MachineModuleInfo.cpp')
0 files changed, 0 insertions, 0 deletions