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author | Neil Henning <neil.henning@amd.com> | 2018-10-31 10:34:48 +0000 |
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committer | Neil Henning <neil.henning@amd.com> | 2018-10-31 10:34:48 +0000 |
commit | 63718b214aff93535f2c349db367f6165bb67e9c (patch) | |
tree | 96a26ad3a7cf5860a1065a355700cdece0fd901f /llvm/lib/CodeGen/MachineModuleInfo.cpp | |
parent | 262baa4753e22ef25906a2fcea6e7e0d7140d9f2 (diff) | |
download | llvm-63718b214aff93535f2c349db367f6165bb67e9c.zip llvm-63718b214aff93535f2c349db367f6165bb67e9c.tar.gz llvm-63718b214aff93535f2c349db367f6165bb67e9c.tar.bz2 |
[AMDGPU] support image load/store a16
Our a16 support was only enabled for sample/gather and buffer
load/store, but not for image load/store operations (which take an i16
as the pixel index rather than a half).
Fix our isel lowering and add test cases to prove it out.
Differential Revision: https://reviews.llvm.org/D53750
llvm-svn: 345710
Diffstat (limited to 'llvm/lib/CodeGen/MachineModuleInfo.cpp')
0 files changed, 0 insertions, 0 deletions