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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2022-06-12 18:56:24 +0100 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2022-06-12 19:25:20 +0100 |
| commit | 1cf9b24da3b8eb8e7636de2209f192ded5ce20cd (patch) | |
| tree | 456525460b2d1473aa2bb8678f555bdbbdeea820 /llvm/lib/CodeGen/MachineModuleInfo.cpp | |
| parent | 4dd1bffc9dac02b34bd1de78808edd9a5955c987 (diff) | |
| download | llvm-1cf9b24da3b8eb8e7636de2209f192ded5ce20cd.zip llvm-1cf9b24da3b8eb8e7636de2209f192ded5ce20cd.tar.gz llvm-1cf9b24da3b8eb8e7636de2209f192ded5ce20cd.tar.bz2 | |
[DAG] Enable ISD::FSHL/R SimplifyMultipleUseDemandedBits handling inside SimplifyDemandedBits
This patch allows SimplifyDemandedBits to call SimplifyMultipleUseDemandedBits in cases where the source operand has other uses, enabling us to peek through the shifted value if we don't demand all the bits/elts.
This helps with several of the regressions from D125836
Diffstat (limited to 'llvm/lib/CodeGen/MachineModuleInfo.cpp')
0 files changed, 0 insertions, 0 deletions