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| author | Hrvoje Varga <Hrvoje.Varga@imgtec.com> | 2016-08-22 12:17:59 +0000 |
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| committer | Hrvoje Varga <Hrvoje.Varga@imgtec.com> | 2016-08-22 12:17:59 +0000 |
| commit | f0ed16eae58479155639e601bbfbff961f2cc49a (patch) | |
| tree | 90ad72b01a3a9055d126202e2dd1f41e2aaeb4de /llvm/lib/CodeGen/MachineInstr.cpp | |
| parent | 80d379f228409f8d8481a265e04bcb5e082c0e74 (diff) | |
| download | llvm-f0ed16eae58479155639e601bbfbff961f2cc49a.zip llvm-f0ed16eae58479155639e601bbfbff961f2cc49a.tar.gz llvm-f0ed16eae58479155639e601bbfbff961f2cc49a.tar.bz2 | |
[mips][microMIPS] Implement BLTZC, BLEZC, BGEZC and BGTZC instructions, fix disassembly and add operand checking to existing B<cond>C implementations
Differential Revision: https://reviews.llvm.org/D22667
llvm-svn: 279429
Diffstat (limited to 'llvm/lib/CodeGen/MachineInstr.cpp')
0 files changed, 0 insertions, 0 deletions