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| author | Luke Lau <luke@igalia.com> | 2024-10-30 15:21:18 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-10-30 17:21:18 +0200 |
| commit | e989e31a47375a7d556269eead538dc65edcef2b (patch) | |
| tree | bd7e531c4469945fd5a408fedf1fb39ea447b669 /llvm/lib/CodeGen/MachineInstr.cpp | |
| parent | f405c683ba929fcd0bcaa435ca2fbe4bb221d04b (diff) | |
| download | llvm-e989e31a47375a7d556269eead538dc65edcef2b.zip llvm-e989e31a47375a7d556269eead538dc65edcef2b.tar.gz llvm-e989e31a47375a7d556269eead538dc65edcef2b.tar.bz2 | |
[RISCV] Mark f16/bf16 lrint and llrint cost as invalid (#113924)
We currently can't lower scalable vector lrint and llrint nodes for bf16
and f16, even with zvfh, and will crash.
Mark the cost as invalid for now to prevent the vectorizers from
emitting them.
Note that we can actually lower fixed-length vectors fine by scalarizing
them, but we were still undercosting these too so I've also included
them. I presume there's an opportunity to improve the codegen later on.
Diffstat (limited to 'llvm/lib/CodeGen/MachineInstr.cpp')
0 files changed, 0 insertions, 0 deletions