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| author | Craig Topper <craig.topper@sifive.com> | 2024-10-30 11:46:15 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-10-30 11:46:15 -0700 |
| commit | c3724ba8667c695f29d5af93f2b0d1b23c1b41e7 (patch) | |
| tree | 0a638fc9c37653aab4089c46098efae5df947e64 /llvm/lib/CodeGen/MachineInstr.cpp | |
| parent | 5bd1af5abcb7b9f92741dd7209e84b5607f7e88a (diff) | |
| download | llvm-c3724ba8667c695f29d5af93f2b0d1b23c1b41e7.zip llvm-c3724ba8667c695f29d5af93f2b0d1b23c1b41e7.tar.gz llvm-c3724ba8667c695f29d5af93f2b0d1b23c1b41e7.tar.bz2 | |
[RISCV] Add OperandType for vector rounding mode operands. (#114179)
Use TSFlags to distinquish which type of rounding mode it is. We use the same tablegen base classes for vxrm and frm sometimes so its hard to have different types for different instructions.
Diffstat (limited to 'llvm/lib/CodeGen/MachineInstr.cpp')
0 files changed, 0 insertions, 0 deletions