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| author | Craig Topper <craig.topper@intel.com> | 2018-03-14 16:55:15 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-03-14 16:55:15 +0000 |
| commit | b36cb20ef9eadc49eac534e9b3999b6d9243d81c (patch) | |
| tree | 8bec7ecf759f796d71613915b4c724ebb8b41e7f /llvm/lib/CodeGen/MachineInstr.cpp | |
| parent | e392ce43157f250859be13eb236fd2a7f7697903 (diff) | |
| download | llvm-b36cb20ef9eadc49eac534e9b3999b6d9243d81c.zip llvm-b36cb20ef9eadc49eac534e9b3999b6d9243d81c.tar.gz llvm-b36cb20ef9eadc49eac534e9b3999b6d9243d81c.tar.bz2 | |
[X86] Teach X86TargetLowering::targetShrinkDemandedConstant to set non-demanded bits if it helps created an and mask that can be matched as a zero extend.
I had to modify the bswap recognition to allow unshrunk masks to make this work.
Fixes PR36689.
Differential Revision: https://reviews.llvm.org/D44442
llvm-svn: 327530
Diffstat (limited to 'llvm/lib/CodeGen/MachineInstr.cpp')
0 files changed, 0 insertions, 0 deletions