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| author | Michael Maitland <michaeltmaitland@gmail.com> | 2024-12-11 10:23:23 -0500 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-12-11 10:23:23 -0500 |
| commit | ad0fbb033d26edafab51e67232c189a52afc4c52 (patch) | |
| tree | e059270989b2b7af039d914d66d9d7540fd7c5b3 /llvm/lib/CodeGen/MachineInstr.cpp | |
| parent | e0c6088bcb5746795f04ab0bf53cec1cfea2480e (diff) | |
| download | llvm-ad0fbb033d26edafab51e67232c189a52afc4c52.zip llvm-ad0fbb033d26edafab51e67232c189a52afc4c52.tar.gz llvm-ad0fbb033d26edafab51e67232c189a52afc4c52.tar.bz2 | |
[RISCV][VLOPT] Add vl-opt-op-info tests for unit strided and strided stores (#119465)
I don't include getOperandInfo for the loads, since they don't take a
vector use operand, and we don't include the loads in isSupportedInstr
so we will never call getOperandInfo on the vector destination of these
instructions.
Don't add support for VSM since we don't have any mask producing
instructions in isSupportedInstr at the moment.
Diffstat (limited to 'llvm/lib/CodeGen/MachineInstr.cpp')
0 files changed, 0 insertions, 0 deletions