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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2025-09-12 18:02:24 +0900 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-09-12 09:02:24 +0000 |
| commit | 9e1d656c682cd0bf6f123fba2064ffdb8861f790 (patch) | |
| tree | 878ef3ba8bc870885e1273c276c4cfa2283e5454 /llvm/lib/CodeGen/MachineInstr.cpp | |
| parent | baec6c55c1ddb226aa50f1663d9a4d61f44e1665 (diff) | |
| download | llvm-9e1d656c682cd0bf6f123fba2064ffdb8861f790.zip llvm-9e1d656c682cd0bf6f123fba2064ffdb8861f790.tar.gz llvm-9e1d656c682cd0bf6f123fba2064ffdb8861f790.tar.bz2 | |
AMDGPU: Remove MIMG special case in adjustAllocatableRegClass (#158184)
I have no idea why this was here. MIMG atomics use tied operands
for the input and output, so AV classes should have always worked.
We have poor test coverage for AGPRs with atomics, so add a partial
set. Everything seems to work OK, although it seems image cmpswap
always uses VGPRs unnecessarily.
Diffstat (limited to 'llvm/lib/CodeGen/MachineInstr.cpp')
0 files changed, 0 insertions, 0 deletions